Entraînement aux concepts de ce débat

Which next-generation lithography technology is essential for pushing transistor density limits and simplifying manufacturing processes for sub-2nm nodes?

• A.High-NA EUV
• B.Electron-beam direct write lithography
• C.Multi-patterning DUV lithography
• D.Backside power delivery networks

What emerging transistor architecture vertically stacks nFETs on top of pFETs to significantly reduce the standard cell area?

• A.Gate-All-Around (GAA) nanosheets
• B.Complementary Field-Effect Transistors (CFET)
• C.Fin Field-Effect Transistors (FinFET)
• D.3D NAND flash

Which historical scaling principle ended around 2006, breaking the automatic guarantee that shrinking transistors would yield lower power and higher clock speeds?

• A.Dennard scaling
• B.Moore's Law
• C.Amdahl's Law
• D.Koomey's Law

Under Dennard Scaling, if transistor linear dimensions scale by a factor of 1/S (where S > 1), what is the expected scaling factor for power density?

• A.1/S^2
• B.1 (It remains constant)
• C.S^2
• D.1/S

Moore's Law originally posited a doubling of components per integrated circuit at what specific time interval before being revised to two years?

• A.18 months
• B.One year
• C.Six months
• D.Three years

Which empirical power-law relates the number of external signal connections to the number of logic gates, driving the need for innovations like backside power delivery?

• A.Moore's Law
• B.Rent's Rule
• C.Dennard Scaling
• D.Metcalfe's Law

How does the current Fed cycle's elevated interest rates disproportionately impact the economic viability of Moore's Law at the leading edge?

• A.(option missing — please regenerate)
• B.(option missing — please regenerate)
• C.(option missing — please regenerate)
• D.(option missing — please regenerate)

How do regional CHIPS Acts and government-mandated supply chain localization fundamentally alter the historical cost-per-transistor decline curve?

• A.They fragment global economies of scale and introduce redundant capital expenditures, causing the historical downward trend in cost per transistor to flatten or reverse.
• B.They accelerate the decline in cost per transistor because massive government subsidies directly offset the capital expenses of building new fabrication plants.
• C.They steepen the cost decline curve by eliminating international shipping expenses and bypassing cross-border tariffs on semiconductor components.
• D.They shift the primary driver of transistor costs away from physical manufacturing and toward advanced artificial intelligence and software design integration.

While Moore's Law predicts transistor density doubling, how does the breakdown of Dennard Scaling fundamentally limit the performance benefits of this increased density?

• A.It restricts the theoretical speedup of multi-core architectures due to the strictly sequential portions of software programs.
• B.It causes power density to increase as transistors shrink, creating thermal limits that prevent all transistors from operating simultaneously at maximum frequency.
• C.It dictates that the physical size of transistors has reached the atomic level, causing quantum tunneling that stops further miniaturization.
• D.It creates a widening gap between processor speed and memory access times, starving the CPU of data.

In the context of AI data centers, how does Amdahl's Law constrain the theoretical performance gains predicted by Moore's Law's continued transistor scaling?

• A.Amdahl's Law guarantees that doubling the number of transistors and GPUs in a data center will result in a proportional, linear halving of AI model training times.
• B.Amdahl's Law suggests that as Moore's Law provides more processors, the parallelizable portion of AI workloads will automatically scale up to utilize all available cores.
• C.Even as Moore's Law exponentially increases the number of parallel processors available, Amdahl's Law dictates that overall speedup is strictly limited by the sequential, non-parallelizable portions of the AI workload.
• D.Amdahl's Law calculates the maximum thermal dissipation allowed in a data center before the dense transistor architectures predicted by Moore's Law begin to throttle.